The reason for chips and encapsulation failure

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Abstract : LED lighting and backlighting technology in the last decades has made a prominent progress, regards as the green light source in next decades. LED light source has been in the field of traditionnal lighting, LED light source, but there are still many unresolved issues.

Beside some of the poor quality, the main unresolved issues is the stable and reliable of led lighting. In the actual use of the process, will face the high temperature, high humidity and other harsh environments, so it will amplify the source defects of LED light, accelerated aging of the material, and cause the LED light source failure quickly eventually.

Physical Mechanism of Failure Mode

LED is a system composed of multiple modules, every parts will cause different failure. From chips to lamp, almost thrity types of failure mode it has.So here, we list that thrity types of failure mode for your reference. Give more useful information to solve your problems.  

Type  LED chips failure mode

Luminous Decay ( Reason for luminous decay):

 Ohmic Contact Maturing  / Electron Migration Dislocation / Current Crowding / Metal Atomic expanded to Active Layer 

LED after Encapsulation

Encapsulation Material Yellowing / Encapsulation-cracked 

/ Interface layer off / Wire Sittching Failure 

LED with  Wcircuit Board 

 Encapsulation-cracked / Soldering-failure 

/ PCB plated throgh hole / Short Circuit



Shell Cracking / Luminous Decay /

 Static Electricity causes failure / light source failure

The reason for chips and encapsulation failure  

LED chip failure caused by the main factors include : static electricity , current and temperature.

Electrostatic discharge can release instant ultra-high voltage, to the LED chip brings great harm, ESD LED chip failure 

is divided into soft failure and hard failure two modes. The high voltage / current caused by the static electricity causes 

the LED chip to short-circuit to become the hard failure mode. LED chip short circuit is due to high voltage to electrolyte breakdown, or too high current density is generated in the chip current path.

Electrostatic discharge A slightly lower voltage / current results in soft failure of the LED chip. Soft failures are usually accompanied by a decrease in the reverse leakage current of the chip, which may be caused by a high reverse current 

that causes a portion of the leakage current path to disappear. Compared to the vertical LED chip, static electricity on 

the level of LED chip harm. Because the level of the LED chip electrode on the same side of the chip, static electricity generated by the instant high voltage more likely to short-circuit the electrode on the chip, which led to LED chip failure.

LED packaging failure caused by the main factors include: temperature, humidity and voltage.

At present, the study of the most in-depth and wide range of temperature on the reliability of LED packaging. Temperature LED module and system failure is due to the following aspects:

(1) high temperature will accelerate the degradation of packaging materials, performance degradation;

(2) junction temperature on the performance of LED will have a great impact. Excessive junction temperature will make the phosphor layer black carbonization, making the LED light effect dramatically reduced or cause catastrophic failure. In addition, due to the silica gel and the phosphor particles between the refractive index and thermal expansion coefficient mismatch, too high temperature will reduce the phosphor conversion efficiency, and the higher the proportion of doped phosphor, the more serious decline in luminous efficiency;

(3) due to the heat transfer coefficient between the packaging material does not match, the temperature gradient and temperature distribution is uneven, the material may produce cracks or interfacial material in the interface between the delamination. These cracks and delamination will cause the decline in luminous efficiency, chip, phosphor layer delamination between the light extraction efficiency can be reduced, the phosphor layer and the encapsulation of silica gel between the delamination of the highest access efficiency can be reduced by more than 20% . The delamination between the silica gel and the substrate may even lead to fracture of the gold wire, resulting in catastrophic failure.